C952 Computer Architecture - Set 5 - Part 2

Test your knowledge of technical writing concepts with these practice questions. Each question includes detailed explanations to help you understand the correct answers.

Question 21: Which network type allows the same instruction to be applied across multiple data streams?

SIMD

MIMD

SISD

UMA

Question 22: What is the purpose of an Arithmetic Logic Unit (ALU) in a processor?

Stores data temporarily

Manages clock cycles

Handles arithmetic and logic operations

Controls peripheral devices

Question 23: What does the term "bisection bandwidth" refer to in multiprocessor networks?

The speed of a single processor

Total cache bandwidth

Data transfer rate between two halves of the network

Synchronization time between processors

Question 24: What does the "write-through" caching policy involve?

Only writing data to cache

Updating both cache and main memory immediately

Writing data to memory only on cache replacement

Writing directly to the lowest level in memory hierarchy

Question 25: What structure provides storage for registers and controls instruction flow in a CPU?

Program counter

Control unit

ALU

Question 26: Which type of memory error occurs due to a cache miss caused by the first access to a block?

Conflict miss

Compulsory miss

Capacity miss

Hit miss

Question 27: What type of parallelism is achieved by performing multiple instructions within a single clock cycle?

Task-level parallelism

Process-level parallelism

Instruction-level parallelism

Memory parallelism

Question 28: Which Java feature encapsulates a method for access by other classes in the same package?

Protected

Public

Private

Static

Question 29: Which memory technique involves reserving space on disk for storing inactive data pages?

Cache mapping

Swap space

TLB mapping

Main memory

Question 30: What is "temporal locality" in the context of memory access?

Accessing data in physically close memory locations

Accessing the same data repeatedly within a short period

Accessing data across distributed networks

Storing data temporarily in registers

Question 31: Which network topology allows every node to communicate with every other node in one hop?

Crossbar network

Cluster network

Star network

Fully connected network

Question 32: What type of program typically serves as a benchmark for comparing computer performance?

Cache simulation

Compiler test

Algorithmic task

Standardized workload

Question 33: In computer architecture, what term describes a measurement of the dynamic frequency of instructions across programs?

Instruction count

Instruction mix

Execution time

Instruction set

Question 34: Which hardware technique reduces data hazards by retrieving data from internal buffers?

Forwarding

Branch prediction

Cache coherence

Pipelining

Question 35: Which system feature controls access to data by only allowing one processor access at a time?

Lock

Cache mapping

Branch table

Data register

Question 36: What type of floating-point number uses a 64-bit doubleword representation?

Single precision

Double precision

Half precision

Quarter precision

Question 37: Which Java component compiles code at runtime, allowing for improved execution speed?

Bytecode compiler

Linker

Just-In-Time (JIT) compiler

Static method

Question 38: In a CPU pipeline, what is the purpose of a "nop" instruction?

Advances the program counter

Prevents the next instruction from executing

Does nothing, inserted to resolve pipeline delays

Controls memory access

Question 39: What does "pipelined execution" enable in CPU architecture?

Simultaneous execution of all instructions

Sequential completion of instructions

Overlapping instruction execution stages

Execution of one instruction per clock cycle

Question 40: What is the purpose of a "guard" bit in floating-point operations?

To perform binary inversion

To reduce floating-point overflow

To improve rounding accuracy

To manage cache coherence

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